Pikuma - Digital Electronics & Computer Architecture 2026-3

File Name

Size

104. Writing to Memory Addresses.mp4

299 MB

2. How to Take this Course.mp4

4.3 MB

3. Electrical Fluid.mp4

80 MB

4. Transmitting Electrical Fluid.mp4

95 MB

5. Reviewing the Atomic Model.mp4

74 MB

6. Conductors & Insulators.mp4

38 MB

7. Electron Spin.mp4

72 MB

8. Electron Flow & Hole Flow.mp4

84 MB

9. Conventional Current & Resistance.mp4

68 MB

10. Measuring Voltage with a Multimeter.mp4

229 MB

11. Limiting Current using Resistors.mp4

194 MB

12. Breadboard Internal Connections.mp4

166 MB

13. LED & Resistor on a Breadboard.mp4

252 MB

14. Autodesk TinkerCad.mp4

7.5 MB

15. Simulating Simple Circuits.mp4

46 MB

16. Path Lower Resistance.mp4

114 MB

17. Some Notes on Circuit Analysis.mp4

90 MB

18. Units of Measurement.mp4

84 MB

19. The Speed of Electricity.mp4

52 MB

20. Prefixes & Conversions.mp4

33 MB

21. Electric Field.mp4

111 MB

22. Telephone Networks & Switchboards.mp4

54 MB

23. Electricity & Magnetism.mp4

49 MB

24. Interactive Visualizations on Magnetism.mp4

37 MB

25. Relays.mp4

56 MB

26. AC vs DC.mp4

59 MB

27. Inductors & Transformers.mp4

50 MB

28. Capacitors.mp4

76 MB

29. Capacitors & Supply Interruptions.mp4

24 MB

30. LED & Capacitor on a Breadboard.mp4

28 MB

31. Diodes & Polarity Protection.mp4

6.4 MB

32. Rectifiers & Smoothing Capacitor.mp4

21 MB

33. Relays & Boolean Logic.mp4

116 MB

34. Analog vs Digital Electronics.mp4

56 MB

35. Logic Gates (AND, OR, & NOT).mp4

67 MB

36. Relay Gates (AND, OR, & NOT).mp4

28 MB

37. Thermionic Emission.mp4

70 MB

38. Vacuum Tube Diode.mp4

42 MB

39. Vacuum Tube Triode.mp4

53 MB

40. Analog Signal Amplification.mp4

101 MB

41. Semiconductors & Doping.mp4

59 MB

42. N-Type & P-Type Semiconductors.mp4

35 MB

43. PN Junction.mp4

89 MB

44. Transistors.mp4

50 MB

45. NPN Transistor.mp4

60 MB

46. Transistors & Amplification.mp4

50 MB

47. BJT 2N2222 on a Breadboard.mp4

93 MB

48. Logic Gates & BJT Transistors.mp4

32 MB

49. AND Gate using Transistors.mp4

128 MB

50. OR Gate using Transistors.mp4

69 MB

51. NOT Gate using Transistors.mp4

56 MB

52. NAND Gate using Transistors.mp4

43 MB

53. Are NAND Gates Easier to Build.mp4

42 MB

54. XOR Gate using Transistors.mp4

26 MB

55. SR Latch.mp4

62 MB

56. SR Latch using NOR Gates.mp4

46 MB

57. Active High & Active Low.mp4

16 MB

58. SR Latch using NAND Gates.mp4

33 MB

59. Gated SR Latch.mp4

44 MB

60. Gated D Latch.mp4

64 MB

61. Clocked D Latch.mp4

74 MB

62. Preset & Clear Inputs.mp4

15 MB

63. Crystal Clock.mp4

105 MB

64. Master-Slave D Flip-Flop.mp4

82 MB

65. JK Flip-Flop.mp4

54 MB

66. T Flip-Flop.mp4

12 MB

67. Binary Counter (Exercise).mp4

41 MB

68. Implementing a Binary Counter.mp4

32 MB

69. Registers.mp4

30 MB

70. CD4014 IC Chip.mp4

33 MB

71. Hierarchies & Subcircuits.mp4

58 MB

72. Write Enable.mp4

67 MB

73. Half Adder.mp4

67 MB

74. Sum of Products.mp4

96 MB

75. SoP Simplifications.mp4

17 MB

76. Full Adder.mp4

35 MB

77. 8-Bit Adder (Exercise).mp4

22 MB

78. Adding Two Bytes.mp4

18 MB

79. 7-Segment Display Driver.mp4

97 MB

80. Double Dabble Algorithm.mp4

92 MB

81. Why Doubling & Why Dabbling.mp4

82 MB

82. Designing a Dabble Chip.mp4

41 MB

83. Designing a Double Dabble Circuit.mp4

110 MB

84. Implementing NOT using NANDs.mp4

51 MB

85. Implementing AND using NANDs.mp4

35 MB

86. Implementing OR using NANDs.mp4

49 MB

87. Implementing XOR using NANDs.mp4

150 MB

88. Completing our 8-Bit Adder.mp4

21 MB

89. Two's Complement.mp4

81 MB

90. Converting Positive to Negative.mp4

45 MB

91. Subtracting Two 8-Bit Numbers.mp4

105 MB

92. The Bus.mp4

71 MB

93. Tri-State Logic.mp4

76 MB

94. Controlled Buffer in Logisim.mp4

91 MB

95. Connecting ALU to Bus.mp4

34 MB

96. Diode Matrix ROM.mp4

115 MB

97. Binary-to-Decimal Decoder.mp4

113 MB

98. Fixing a Small Decoder Mistake.mp4

44 MB

99. Memory Cells using Latches.mp4

46 MB

100. Reading a Word from Memory.mp4

76 MB

101. Read Enable Input.mp4

73 MB

102. Types of ROM.mp4

48 MB

103. Combinational Circuits vs ROM.mp4

46 MB

1. Motivations & Learning Outcomes.mp4

102 MB

105. Implementing 16 Bytes of RAM.mp4

204 MB

106. Addressing Rows & Columns.mp4

87 MB

107. 74LS219 & 74F189 RAM ICs.mp4

50 MB

108. SRAM vs DRAM.mp4

110 MB

109. Custom RAM Circuit Appearance.mp4

64 MB

110. Connecting MAR & RAM to Bus.mp4

49 MB

111. Connecting Registers & ALU to Bus.mp4

38 MB

112. Exercise Manually Storing RAM Values.mp4

27 MB

113. Manually Storing RAM Values.mp4

62 MB

114. Von Neumann Architecture.mp4

23 MB

115. Program Instructions.mp4

87 MB

116. Output Register.mp4

17 MB

117. Instruction Register & Program Counter.mp4

68 MB

118. Fetch-Execute LDA Instruction.mp4

58 MB

119. Fetch-Execute ADD Instruction.mp4

35 MB

120. Fetch-Execute OUT Instruction.mp4

12 MB

121. Programming Instructions in RAM.mp4

39 MB

122. Manually Executing Micro-Instructions.mp4

82 MB

123. Malvino's SAP-1 Computer.mp4

133 MB

124. Control Unit Sequencer.mp4

85 MB

125. Ring Counter.mp4

82 MB

126. Instruction Decoder.mp4

31 MB

127. Control Unit Inputs & Outputs.mp4

112 MB

128. Changing PC Appearance.mp4

69 MB

129. CU Logic for the Fetch Cycle.mp4

61 MB

130. CU Logic for the LDA Instruction.mp4

153 MB

131. CU Logic for ADD & OUT Instructions.mp4

104 MB

132. Halting the Control Unit.mp4

104 MB

133. Resetting the CPU.mp4

30 MB

134. Adding More CPU Instructions.mp4

84 MB

135. Microinstructions for SUB, STA, & JMP.mp4

105 MB

136. Programming the Loop Program.mp4

197 MB

137. Running our First Loop Program.mp4

119 MB

138. Computers & Computability.mp4

92 MB

139. Turing Completeness.mp4

68 MB

140. 16-Bit Long Instructions.mp4

84 MB

141. Instruction Register Hi & Lo Bytes.mp4

89 MB

142. Implementing 256 Bytes of RAM.mp4

110 MB

143. Changing our RAM Circuit Design.mp4

22 MB

144. Increasing Ring Counter Steps.mp4

96 MB

145. Storing CU Logic in ROM.mp4

149 MB

146. Encoding TSteps in Binary.mp4

78 MB

147. Testing our ROM Addresses.mp4

18 MB

148. Logisim's ROM Text File Format.mp4

46 MB

149. A Spreadsheet of CU ROM Values.mp4

62 MB

150. A Python Script to Export ROM.mp4

44 MB

151. Connecting All CU Signals.mp4

56 MB

152. Visualizing TSteps using LEDs.mp4

127 MB

153. Hardwiring CU Signals for T0 & T1.mp4

55 MB

154. Loading Instructions using Hex.mp4

14 MB

155. Running our Code with the CU ROM.mp4

64 MB

156. Removing T0 and T1 from ROM.mp4

107 MB

157. Exercise Adding Steps T8 and T9.mp4

75 MB

158. Adding Steps T8 and T9.mp4

57 MB

159. ALU Operation Selection.mp4

85 MB

160. New ALU & Branch Instructions.mp4

81 MB

161. Our New ALU Logisim Component.mp4

78 MB

162. Exercise Bitwise AND.mp4

28 MB

163. Bitwise AND & ALU Op Decoder.mp4

85 MB

164. Bitwise OR, XOR, & NOT.mp4

49 MB

165. Shifting Bits Right & Left.mp4

65 MB

166. Zero, Negative, & Carry Flags.mp4

72 MB

167. ALU Ops Microinstructions.mp4

108 MB

168. Including ALU Ops in our CU ROM.mp4

97 MB

169. Processor Status Flags Register.mp4

136 MB

170. Using Flags in our CU Logic.mp4

146 MB

171. Jump Condition Ops.mp4

65 MB

172. Decoding Condition Ops.mp4

80 MB

173. Matching Condition Ops & Flags.mp4

88 MB

174. Adding BRK to ALU Ops.mp4

24 MB

175. Exercise Even & Odd Numbers.mp4

46 MB

176. Code to Test Even & Odd Numbers.mp4

57 MB

177. Step by Step Even & Odd Code.mp4

42 MB

178. Exercise Countdown Loop.mp4

16 MB

179. Countdown Loop Assembly Code.mp4

109 MB

180. Exercise Fibonacci Sequence.mp4

44 MB

181. Fibonacci Sequence in Python.mp4

33 MB

182. Fibonacci Sequence Assembly Code.mp4

53 MB

183. Writing a Simple Assembler.mp4

52 MB

184. Reading Command Line Args.mp4

41 MB

185. Collecting All Labels.mp4

42 MB

186. Generating Machine Code.mp4

41 MB

187. Assembling our Fibonacci Code.mp4

26 MB

188. ADD & SUB Immediate.mp4

31 MB

189. Countdown Loop using SUB Immediate.mp4

24 MB

190. Absolute vs Relative Jumps.mp4

16 MB

191. Working with Multiple Registers.mp4

73 MB

192. Benefits of Multiple Registers.mp4

46 MB

193. Register File.mp4

65 MB

194. RISC vs CISC.mp4

156 MB

195. Instruction Pipeline.mp4

128 MB

196. Digital Logic Circuit Technologies.mp4

83 MB

197. MOSFETs.mp4

104 MB

198. N-Channel MOSFET.mp4

78 MB

199. P-Channel MOSFET.mp4

27 MB

200. Enhancement vs Depletion Mode.mp4

44 MB

201. CMOS.mp4

44 MB

202. Conclusion & Next Steps.mp4

200 MB

Readme.txt

129 B

code/1. Electrons & Orbitals.htm

3.3 MB

code/2. Where's the Bread.htm

2.4 MB

code/3. Electronic Color Code.htm

1.3 MB

code/4. Kirchhoff's Laws & Circuit Analysis.htm

1.9 MB

code/5. What is Ground.htm

1.5 MB

code/6. Animal Electricity.htm

2.3 MB

code/7. Diodes.htm

5.4 MB

code/8. Cathode & Anode.htm

1.5 MB

code/9. Signal Debouncing using a Latch.htm

1.7 MB

code/10. Master-Slave JK Flip-Flop.htm

1.2 MB

code/11. Halving Values using Flip-Flops.htm

1.2 MB

code/12. Integrated Circuits.htm

1.5 MB

code/13. Multiplexers.htm

1.2 MB

code/14. Combinational vs Sequential Circuits.htm

1.2 MB

code/A Python Script to Export ROM/export.py

1.4 kB

code/A Python Script to Export ROM/output.hex.txt

2.4 kB

code/A Python Script to Export ROM/rom-cu.csv

35 kB

code/A Python Script to Export ROM/rom-cu.xlsx

59 kB

code/A Spreadsheet of CU ROM Values/rom-cu.xlsx

59 kB

code/ADD & SUB Immediate/export.py

1.4 kB

code/ADD & SUB Immediate/output.hex.txt

2.4 kB

code/ADD & SUB Immediate/rom-cu.csv

36 kB

code/ADD & SUB Immediate/rom-cu.xlsx

61 kB

code/Adding Steps T8 and T9/export.py

1.4 kB

code/Adding Steps T8 and T9/output.hex.txt

2.4 kB

code/Adding Steps T8 and T9/rom-cu.csv

35 kB

code/Adding Steps T8 and T9/rom-cu.xlsx

59 kB

code/Addressing Rows & Columns/datasheet.pdf

301 kB

code/Addressing Rows & Columns/sc--datasheet.pdf

71 kB

code/Addressing Rows & Columns/Words Stored in Rows & Columns.html

1.0 MB

code/Assembling our Fibonacci Code/assembler.zip

3.8 kB

code/CMOS/MOSFET & CMOS Manufacturing.html

1.4 MB

code/Collecting All Labels/assembler.zip

3.0 kB

code/Connecting ALU to Bus/Hexadecimal Notation.html

1.2 MB

code/Controlled Buffer in Logisim/Tri-State Buffer & Register IC.html

1.3 MB

code/Countdown Loop using SUB Immediate/assembler.zip

4.0 kB

code/Digital Logic Circuit Technologies/Families of Digital Logic Circuits.html

1.6 MB

code/Fetch-Execute OUT Instruction/Accumulator-Based Architecture.html

893 kB

code/Generating Machine Code/assembler.zip

3.3 kB

code/Implementing 256 Bytes of RAM/MicroInstructions.pdf

53 kB

code/Manually Storing RAM Values/Memory in the Real World.html

6.6 MB

code/Reading Command Line Args/assembler.zip

2.8 kB

code/Register File/Register-Based Architectures.html

956 kB

code/Resetting the CPU/Instruction Pointer.html

1.1 MB

code/Running our Code with the CU ROM/_rom-cu.csv

35 kB

code/Running our Code with the CU ROM/6export.py

1.4 kB

code/Running our Code with the CU ROM/output.hex.txt

2.4 kB

code/Running our Code with the CU ROM/rom-cu.xlsx

59 kB

code/Subtracting Two 8-Bit Numbers/74283 4-Bit Adder IC.html

1.9 MB

code/Subtracting Two 8-Bit Numbers/Fast Carry.html

1.2 MB